A semiconductor memory device typically contains a plurality of memory cells, and a cell field formed in a matrix of row lines and column lines or word lines and bit lines. Actual memory cells are disposed at intersections of feed lines formed of a conductive material. The row lines and column lines or the word lines and bit lines are respectively connected electrically to memory cells through an upper electrode and a lower electrode. In order to change the data content in a certain memory cell at an addressing intersection, or in order to access the data of a memory cell, a corresponding word line and bit line are selected, and a write current or a read current is supplied. For this end, the word lines and bit lines are controlled by a corresponding control device.
Many types of semiconductor memories, such as a random access memory (RAM) that includes a plurality of memory cells each having one capacitor connected to a select transistor, are publicly known. By selectively applying a voltage through a column line and a row line to a corresponding select transistor, electrical charges are stored in data units (bits) in a capacitor during a write process and are re-accessed through the select transistor during a read process. Because a RAM device is the random access memory, data can be stored at a specific address and can later be read at the same address.
Another type of semiconductor memory is a dynamic RAM (DRAM) that generally includes only a single capacitive device correspondingly controlled, for example, a trench capacitor. Through the capacitance of the trench capacitor, individual bits can be respectively stored as charges. However, because stored charges can be retained for relatively short periods of time within a DRAM cell, a refresh must be performed every 64 ms (for example). That is, data content must be re-written in a memory cell.
In contrast, each cell of a static RAM (SRAM) generally includes a plurality of transistors. As opposed to the DRAM, there is no need to perform a refresh in the SRAM because data stored in the transistors of a memory cell is maintained during the applying of a voltage corresponding to the SRAM. Only in non-volatile memory (NVM) devices, such as an erasable programmable read-only memory (EPROM), an electrically erasable programmable ROM (EEPROM), and a flash memory, stored data can be retained even when an applied voltage is interrupted.
Today's semiconductor memory technology in general is largely based on the principle of storing charges in a material fabricated through standard complementary metal-oxide-semiconductor (CMOS) processing. The limitation of leakage current within a memory capacitor that induces charge loss or data loss in a DRAM has thus far been resolved with unsatisfactory methods such as continual refreshing of stored charges. Flash memories have the limitation to write and read cycles due to a barrier layer, and optimal solutions have not yet been found to address high voltages and slow read and write cycles.
Since a DRAM device must, in general, include as many memory cells as possible, there has been a need to raise its degree of integration by forming memory cells in the simplest way possible and in the smallest area possible. Memories used to date (NVM, flash memory, and DRAM, for example), due to their operating methods that rely on storing charges, will most likely face physical scaling limitations in the near future.
Also, there are additional limitations in flash memories and DRAMs, that is, the limitations of high switching voltage and limited read and write cycles in the flash memories, and limited retention time for stored charge in the DRAMs.
As a solution for the above limitations, a conductive bridging RAM (CBRAM) has recently been introduced, which is a memory that can store digital data through resistance switching. A CBRAM cell can be switched through a difference in electrical resistance values generated by a bipolar electrical pulse.